/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2024 Napatech A/S
 */

/*
 * nthw_fpga_reg_defs_prm_nt400dxx.h
 *
 * Auto-generated file - do *NOT* edit
 *
 */

#ifndef _NTHW_FPGA_REG_DEFS_PRM_NT400DXX_
#define _NTHW_FPGA_REG_DEFS_PRM_NT400DXX_

/* PRM_NT400DXX */
#define NTHW_MOD_PRM_NT400DXX (0xfccf12a8UL)
#define PRM_NT400DXX_RST (0x9c1555f7UL)
#define PRM_NT400DXX_RST_PERIPH (0xe08c7c1cUL)
#define PRM_NT400DXX_RST_PLATFORM (0x866ae8d1UL)

#endif	/* _NTHW_FPGA_REG_DEFS_PRM_NT400DXX_ */

/*
 * Auto-generated file - do *NOT* edit
 */
