/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2024 Napatech A/S
 */

/*
 * nthw_fpga_reg_defs_tint.h
 *
 * Auto-generated file - do *NOT* edit
 *
 */

#ifndef _NTHW_FPGA_REG_DEFS_TINT_
#define _NTHW_FPGA_REG_DEFS_TINT_

/* TINT */
#define NTHW_MOD_TINT (0xb8aea9feUL)
#define TINT_CTRL (0x95bdc9c3UL)
#define TINT_CTRL_INTERVAL (0xfe472b70UL)
#define TINT_STATUS (0x2557d8a6UL)
#define TINT_STATUS_DELAYED (0xabd2ff4cUL)
#define TINT_STATUS_SKIPPED (0x1c35b879UL)

#endif	/* _NTHW_FPGA_REG_DEFS_TINT_ */

/*
 * Auto-generated file - do *NOT* edit
 */
