/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2024 Napatech A/S
 */

/*
 * nthw_fpga_reg_defs_rpl.h
 *
 * Auto-generated file - do *NOT* edit
 *
 */

#ifndef _NTHW_FPGA_REG_DEFS_RPL_
#define _NTHW_FPGA_REG_DEFS_RPL_

/* RPL */
#define NTHW_MOD_RPL (0x6de535c3UL)
#define RPL_EXT_CTRL (0x4c47804fUL)
#define RPL_EXT_CTRL_ADR (0xe391ddadUL)
#define RPL_EXT_CTRL_CNT (0xf399447cUL)
#define RPL_EXT_DATA (0xe3960256UL)
#define RPL_EXT_DATA_RPL_PTR (0xa8e4d0d9UL)
#define RPL_RCP_CTRL (0xc471325fUL)
#define RPL_RCP_CTRL_ADR (0x1f2d3a2bUL)
#define RPL_RCP_CTRL_CNT (0xf25a3faUL)
#define RPL_RCP_DATA (0x6ba0b046UL)
#define RPL_RCP_DATA_DYN (0xe361554fUL)
#define RPL_RCP_DATA_ETH_TYPE_WR (0xfc7f05c1UL)
#define RPL_RCP_DATA_EXT_PRIO (0xcd2ae9d1UL)
#define RPL_RCP_DATA_LEN (0xb0559aaUL)
#define RPL_RCP_DATA_OFS (0x4168d8e9UL)
#define RPL_RCP_DATA_RPL_PTR (0x3000a098UL)
#define RPL_RPL_CTRL (0xe65376ecUL)
#define RPL_RPL_CTRL_ADR (0x15abf987UL)
#define RPL_RPL_CTRL_CNT (0x5a36056UL)
#define RPL_RPL_DATA (0x4982f4f5UL)
#define RPL_RPL_DATA_VALUE (0x60951eb4UL)

#endif	/* _NTHW_FPGA_REG_DEFS_RPL_ */

/*
 * Auto-generated file - do *NOT* edit
 */
