/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2024 Napatech A/S
 */

/*
 * nthw_fpga_reg_defs_sdc.h
 *
 * Auto-generated file - do *NOT* edit
 *
 */

#ifndef _NTHW_FPGA_REG_DEFS_SDC_
#define _NTHW_FPGA_REG_DEFS_SDC_

/* SDC */
#define NTHW_MOD_SDC (0xd2369530UL)
#define SDC_CELL_CNT (0xc6d82110UL)
#define SDC_CELL_CNT_CELL_CNT (0xdd4de629UL)
#define SDC_CELL_CNT_PERIOD (0x8dfef1d4UL)
#define SDC_CELL_CNT_PERIOD_CELL_CNT_PERIOD (0x2b5819c1UL)
#define SDC_CTRL (0x1577b205UL)
#define SDC_CTRL_INIT (0x70e62104UL)
#define SDC_CTRL_RESET_POINTERS (0xec1c0f9cUL)
#define SDC_CTRL_RUN_TEST (0x2efbe98eUL)
#define SDC_CTRL_STOP_CLIENT (0xb11ebe2dUL)
#define SDC_CTRL_TEST_EN (0xaa1fa4UL)
#define SDC_FILL_LVL (0xd3b30232UL)
#define SDC_FILL_LVL_FILL_LVL (0xc97281acUL)
#define SDC_MAX_FILL_LVL (0x326de743UL)
#define SDC_MAX_FILL_LVL_MAX_FILL_LVL (0x915fbf73UL)
#define SDC_STAT (0x37ed3c5eUL)
#define SDC_STAT_CALIB (0x27122e80UL)
#define SDC_STAT_CELL_CNT_STOPPED (0x517d5cafUL)
#define SDC_STAT_ERR_FOUND (0x3bb6bd0UL)
#define SDC_STAT_INIT_DONE (0x1dc2e095UL)
#define SDC_STAT_MMCM_LOCK (0xd9aac1c2UL)
#define SDC_STAT_PLL_LOCK (0x3bcab6ebUL)
#define SDC_STAT_RESETTING (0xa85349c1UL)

#endif	/* _NTHW_FPGA_REG_DEFS_SDC_ */
